1. Technical Field
The present invention relates to communication network transceivers, more specifically to techniques for adjusting equalizer setting for reception of transmitted data from a network medium.
2. Background Art
Local area networks use a network cable or other network media to link nodes (e.g., workstations, routers and switches) to the network. Each local area network architecture uses a physical layer (PHY) transceiver for translating digital data into an analog signal for transmission on the network medium. The PHY transceiver also is configured for receiving analog signals transmitted from a remote node via the network medium and recovering the digital data from the received analog signals.
FIG. 1 is a block diagram illustrating a conventional two-station network having a transmitter 10 at a first node transmitting an analog signal carrying data to a receiver 12 at a second node via a network medium 14, for example a network cable. The signal transmitted by the medium 14 will experience different attenuation and intersymbol interference based on different cable lengths, as well as voltage and temperature variations. Hence, the receiver 12 must equalize the input signal from the medium 14 to compensate for the attenuation and intersymbol interference.
As shown in FIG. 1, the receiver 12 includes an equalizer 16, a cable length detector 18, and a phase locked loop (PLL) 20. The equalizer 16 attempts to compensate for the attenuation and intersymbol interference based on predetermined cable length settings, specified by the cable length detector 18. The cable length detector 18 detects the length of the cable medium 14 by monitoring the input waveform from the medium 14, and estimating the cable length of the medium 14 based on the attenuation characteristics, for example the signal amplitude or rise time (e.g., slew rate) of the signal. The phase locked loop 20 then recovers the clock signal (RCLK) and the transmitted data (RDATA) from the equalized signal.
The PLL 20 determines the phase and frequency relationship of the incoming data signal in order to determine the best sampling points. In particular, the data bits in the equalized signal output by the equalizer 16 are ideally recovered by sampling at the center of each bit. Since the frequency and phase of the reference clock in the transmitter 10 and the reference clock in the receiver 12 are slightly different, the PLL 20 is needed to determine the best sampling points in the equalized signal. Hence, it is important for high speed receivers to correctly determine the cable length in order to perform proper equalization so that the incoming data signal can be recovered by the PLL 20.
Differences in phase between the incoming signal and the reference clock of the receiver 12 can arise due to differences in the frequency and phase of the transmitter and receiver reference clocks, as well as jitter introduced by the medium 14. The PLL 20 is generally able to adjust to the phase differences encountered due to the relatively small differences in the frequency and phase between the transmitter and receiver reference clocks. Jitter introduced by the medium 14 and the transmitter/receiver system, however, is instantaneous, such that the PLL 20 does not have time to adjust for the relatively quick phase shift. Hence, the jitter may cause the PLL to output erroneous data on the data signal (RDATA).
In addition, the equalizer 16 must be properly configured for the PLL 20 to work properly. If the data signal received from the medium 14 is not properly equalized, the attenuation and intersymbol interference will show up as jitter in the equalized signal. Although the PLL 20 can theoretically tolerate jitter up to the period it takes to transmit one bit, in practice this jitter tolerance is somewhat less than the full bit for high speed data transmissions.
A problem with the receiver 12 of FIG. 1 is that the cable length is detected via an open loop. In other words, there is no feedback as to whether or not the equalizer setting selected by the cable length detector 18 is the optimal equalizer setting to use to minimize jitter. Hence, the cable length detector 18 may not select the optimum equalizer setting, causing additional jitter to be introduced into the equalized signal. Hence, the data signal (RDATA) may have erroneous data because the phase locked loop 20 is unable to recover from the jitter conditions introduced by the receiver 12 in the equalized signal.